Method and system for constructing compiler intermediate representations from TensorFlow graph
US11960866B2 · kind B2 · utility
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Key dates
| Filing date | Feb 10, 2022 |
| Grant date | Apr 16, 2024 |
| Priority date | — |
| Expiry date | Jun 5, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/41
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system are provided to construct, from a TensorFlow graph, a common intermediate representation that can be converted to a plurality of compiler intermediate representations (IRs), which enables compiler optimization to be applied efficiently.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.