Display processing circuitry
US11961431B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 12, 2021 |
| Grant date | Apr 16, 2024 |
| Priority date | — |
| Expiry date | Mar 12, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/06
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The disclosure describes aspects of a display processing circuitry. In an aspect, one or more displays that support multiple views include one or more arrays of pixels, one or more backplanes, and a processing circuitry configured to receive one or more data streams, control processing of the data streams based on policies from which to select a mode of operation, each mode of operation defining which rays of light the arrays of pixels in the displays are to contribute to generate a particular view or views and the tasks to be performed by the processing circuitry to modify the data streams accordingly. The processing circuitry further provides signaling representative of the modified data streams to the arrays of pixels through a circuit configuration of the backplanes for the arrays of pixels to contribute the rays that will to generate the particular view or views. A corresponding method is also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.