Display panel and display device
US11961483B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2023 |
| Grant date | Apr 16, 2024 |
| Priority date | — |
| Expiry date | Apr 27, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/065
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display panel includes at least one pixel circuit and a light emitting element. One pixel circuit includes a driving transistor, and second and third transistors. The second transistor is connected between data line and a source of the driving transistor. The third transistor is connected between voltage adjusting signal line and the source. During a data writing phase, the second transistor is turned on, the data line provides data signal equal to VData to the source, a gate of the driving transistor receives the data signal, and voltage of the gate is VData+Vth. Vth denotes threshold voltage of the driving transistor. During a reset and adjustment phase, the third transistor is turned on, the voltage adjusting signal line provides adjusting voltage to the source, voltage of the source of the driving transistor is VJ, and the voltage of the gate remains VData+Vth. VData+Vth−VJ≤−2V.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.