Threshold-based min-sum algorithm to lower the error floors of quantized low-density parity-check decoders
US11962324B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Apr 29, 2022 |
| Grant date | Apr 16, 2024 |
| Priority date | — |
| Expiry date | Apr 29, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M9/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A modified version of the min-sum algorithm (“MSA”) which can lower the error floor performance of quantized LDPC decoders. A threshold attenuated min-sum algorithm (“TAMSA”) and/or threshold offset min-sum algorithm (“TOMSA”), which selectively attenuates or offsets a check node log-likelihood ratio (“LLR”) if the check node receives any variable node LLR with magnitude below a predetermined threshold, while allowing a check node LLR to reach the maximum quantizer level if all the variable node LLRs received by the check node have magnitude greater than the threshold. Embodiments of the present invention can provide desirable results even without knowledge of the location, type, or multiplicity of such objects and can be implemented with only a minor modification to existing decoder hardware.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.