Display panel including phase retardation and linear polarizing layers
US11963393B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 12, 2020 |
| Grant date | Apr 16, 2024 |
| Priority date | — |
| Expiry date | Jun 12, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K2102/351
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A display panel is provided. The display panel includes a substrate, a thin film transistor array layer disposed on the substrate, a light emitting device layer disposed on the thin film transistor array layer, a thin film encapsulation layer disposed on the light emitting device layer, a phase retardation layer disposed within the thin film encapsulation layer, and a linear polarizing layer disposed within the thin film encapsulation layer. By removing a conventional polarizer, a problem in a conventional display panel that disposition of a polarizer limits a thickness of the entire display panel and reduces bending performance of the display panel is solved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.