Patent · US Active

Processor and method for flushing translation lookaside buffer according to designated key identification code

US11966738B2 · kind B2 · utility

0Cited by
1References
27Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 14, 2022
Grant dateApr 23, 2024
Priority date
Expiry dateOct 14, 2042

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/30145
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A technology for flushing a translation lookaside buffer (TLB) according to a designated key identification code (designated key ID). An instruction of an instruction set architecture is proposed to flush the TLB according to the designated key ID. A decoder transforms the instruction into at least one microinstruction. According to a flushing microinstruction included in the at least one microinstruction, a designated key ID is supplied to a control logic circuit of the TLB through a memory order buffer, so that the control logic circuit flushes matched entries in the TLB, wherein the matched entries match the designated key ID.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.