Nonvolatile memory device and storage device including nonvolatile memory device
US11967367B2 · kind B2 · utility
0Cited by
16References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 9, 2022 |
| Grant date | Apr 23, 2024 |
| Priority date | — |
| Expiry date | Jul 15, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a nonvolatile memory device which includes a memory cell array, a row decoder circuit that selects one wordline as a target of a program operation, a page buffer circuit that stores data to be written in memory cells connected with the selected wordline in the program operation, and a pass/fail check circuit that determines a pass or a fail of the program operation. In the program operation, the pass/fail check circuit detects a first program speed of first memory cells and a second program speed of second memory cells, and determines a program fail based on the first program speed and the second program speed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.