Interface system for interconnected die and MPU and communication method thereof
US11971446B2 · kind B2 · utility
Inventors
Key dates
| Filing date | Dec 16, 2021 |
| Grant date | Apr 30, 2024 |
| Priority date | — |
| Expiry date | May 21, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7825
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The invention discloses an interface system for an interconnected die and an MPU and a communication method thereof. The system comprises a data interface, an interrupt interface, and a debugging interface; the data interface comprises an SPI interface, a DDR data interface, and a DMA control interface; the interrupt interface is used for receiving an interrupt data packet from the network and parsing the interrupt data packet to obtain a pulse interrupt input required by the MPU; the debugging interface comprises a JTAG-Core debugging interface, which is used for receiving a debugging data packet from the network and translating the debugging data packet into a JTAG protocol for MPU debugging. The invention realizes the expansion of the master device MPU in the high-performance information processing microsystem and the high-speed communication between the master device and the interconnected dies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.