Isolation of compartments in a layered printed circuit board, and apparatus and methods for the same
US11972190B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 5, 2023 |
| Grant date | Apr 30, 2024 |
| Priority date | — |
| Expiry date | Jan 5, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10613
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In some embodiments, an apparatus can include a printed circuit board (PCB) that has layers and includes a first portion and a second portion. The first portion can have a data port and a power port. A first layer is associated with data of the first portion of the PCB, and a second layer is associated with power of the first portion of the PCB. The second portion can have a data port and a power port. A third layer is associated with data of the second portion, and a fourth layer is associated with power of the second portion. The first portion or the second portion can have vias defining an electromagnetic interference (EMI) shield. The apparatus can include a power filter and a data filter that can, respectively, isolate power and data of the first portion from the second portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.