Manufacturing method for semiconductor laminated film, and semiconductor laminated film

US11972947B2 · kind B2 · utility

Assignees

• NATIONAL UNIVERSITY ORPORATION TOKYO UNIVERSITY OF AGRICULTURE AND TECHNOLOGY · JP
• NATIONAL INSTITUTE OF INFORMATION AND COMMUNICATIONS TECHNOLOGY · JP

Inventors

• Yoshiyuki Suda · Koganei, JP
• Takahiro Tsukamoto · Hoya, DE
• Akira MOTOHASHI · Tokyo, JP
• Kyohei Degura · Fuchu, JP
• Katsumi Okubo · Fuchu, JP
• Takuma YAGI · Sapporo, JP
• Akifumi KASAMATSU · Koganei, JP
• Nobumitsu Hirose · Tokyo, JP
• Toshiaki Matsui · Koganei, JP

Key dates

• Filing date: Mar 10, 2021
• Grant date: Apr 30, 2024
• Expiry date: Aug 18, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/471
• WIPO field: Surface technology, coating
• WIPO sector: Chemistry

Abstract

A semiconductor laminate film includes a silicon substrate and a semiconductor layer formed on the silicon substrate and containing silicon and germanium. The semiconductor layer having a surface roughness Rms of 1 nm or less. Further, the semiconductor layer satisfies the following relationship t≤0.881×x−4.79 where t represents a thickness (nm) of the semiconductor layer, and x represents a ratio of the number of germanium atoms to a sum of the number of silicon atoms and the number of germanium atoms in the semiconductor layer. Also, the semiconductor layer being a mixed crystal semiconductor layer containing silicon and germanium.