Semiconductor structure and method of manufacturing a semiconductor structure
US11972973B1 · kind B1 · utility
Inventor
Key dates
| Filing date | Oct 4, 2023 |
| Grant date | Apr 30, 2024 |
| Priority date | — |
| Expiry date | Oct 4, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53238
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present application discloses a semiconductor structure and a method of manufacturing a semiconductor structure. The semiconductor structure includes a conductive line of an Nth metal layer, a first insulating layer, a dielectric layer, a second insulating layer, an interconnect base, and an interconnect body. The first insulating layer is on the conductive line and free from covering a portion of the conductive line. The dielectric layer is on the first insulating layer and free from covering the portion of the conductive line. The second insulating layer is on the dielectric layer and free from covering the portion of the conductive line. The interconnect base is laterally surrounded by the dielectric layer, the first insulating layer, and the second insulating layer. A top surface of the interconnect base and a top surface of the second insulating layer are coplanar.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.