Array substrate and display apparatus
US11974463B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 19, 2020 |
| Grant date | Apr 30, 2024 |
| Priority date | — |
| Expiry date | Oct 1, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/80515
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An array substrate is provided. The array substrate includes a node connecting line in a same layer as a respective voltage supply line, connected to a first capacitor electrode and a semiconductor material layer. An orthographic projection of a first anode on a base substrate at least partially overlaps with an orthographic projection of a node connecting line in a respective first subpixel. An orthographic projection of a second anode on the base substrate at least partially overlaps with an orthographic projection of the node connecting line in a respective second subpixel. An orthographic projection of a third anode on the base substrate at least partially overlaps with an orthographic projection of the node connecting line in a respective third subpixel. An orthographic projection of a fourth anode on the base substrate at least partially overlaps with an orthographic projection of the node connecting line in a respective fourth subpixel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.