Transconductors with improved slew performance and low quiescent current
US11977402B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 29, 2021 |
| Grant date | May 7, 2024 |
| Priority date | — |
| Expiry date | Nov 29, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45288
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a low power fast differential transconductor, which provides an output current as a function of a difference between a reference potential input and a feedback potential input. The transconductance increases as an absolute value of the difference between the reference potential and the feedback potential increases. The transconductor includes a reference input stage to receive the reference potential and a reference load coupled in series with the reference input stage. The transconductor includes a feedback input stage to receive the feedback potential and a feedback load coupled in series with the feedback input stage. The transconductor further includes a current limiting component that is configured to control a total current through the reference input stage and the feedback input stage. The transconductor includes a negative feedback path from the reference load to the current limiting component, that compensates for changes in the total current due to differences between the reference potential and the feedback potential.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.