Issuing a sequence of instructions including a condition-dependent instruction
US11977896B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 12, 2022 |
| Grant date | May 7, 2024 |
| Priority date | — |
| Expiry date | Nov 8, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/825
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus, method and computer program, the apparatus comprising processing circuitry to execute instructions, issue circuitry to issue the instructions for execution by the processing circuitry, and candidate instruction storage circuitry to store a plurality of condition-dependent instructions, each specifying at least one condition. The issue circuitry is configured to issue a given condition-dependent instruction in response to a determination or a prediction of the at least one condition specified by the given condition-dependent instruction being met, and when the given condition-dependent instruction is a sequence-start instruction, the issue circuitry is responsive to the determination or prediction to issue a sequence of instructions comprising the sequence-start instruction and at least one subsequent instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.