Integrated circuit (IC) having an analog multiplexer (MUX)
US11979151B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 20, 2022 |
| Grant date | May 7, 2024 |
| Priority date | — |
| Expiry date | Sep 20, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/46
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes a plurality of analog inputs, and an analog multiplexer (MUX). The MUX includes a common output node configured to provide a MUX output, a plurality of analog switches, and a shared buffer. Each switch includes a corresponding bootstrap circuit coupled to a control electrode of a corresponding pass transistor in which the corresponding bootstrap circuit includes a corresponding boosting capacitor. Each analog switch of the plurality of analog switches has a first input coupled to a corresponding analog input of the plurality of analog inputs, a second input, and an output coupled to the common output node. The shared buffer has an input coupled to the common output node and coupled to provide a common buffered MUX output to the second input of each of the plurality of analog switches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.