Substrate analysis apparatus and substrate analysis method
US11982705B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 9, 2022 |
| Grant date | May 14, 2024 |
| Priority date | — |
| Expiry date | Nov 29, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67745
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A substrate analysis apparatus is provided. The substrate analysis includes: an interlayer conveying module configured to transport a first FOUP; an exchange module which is connected to the interlayer conveying module, and configured to transfer a wafer from the first FOUP to a second FOUP; a pre-processing module configured to form a test wafer piece using the wafer inside the second FOUP; an analysis module configured to analyze the test wafer piece; and a transfer rail configured to transport the second FOUP containing the wafer and a tray containing the test wafer piece. The wafer includes a first identifier indicating information corresponding to the wafer, the test wafer piece includes a second identifier indicating information generated by the pre-processing module which corresponds to the test wafer piece, and the analysis module is configured to analyze the first identifier and the second identifier in connection with each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.