Memory controller and memory system
US11983436B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 30, 2022 |
| Grant date | May 14, 2024 |
| Priority date | — |
| Expiry date | Jun 28, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7208
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory controller includes a buffer memory including memory banks, one or more host access units configured to perform an access to the buffer memory for a host, one or more memory access units configured to perform an access to the buffer memory for a memory device, and a processor configured to control an operation of the memory controller. The processor divides the memory banks into an external memory bank group for an external operation related to the host, and an internal memory bank group for an internal operation within a memory system. The host access units access the external memory bank group. The memory access units access the external memory bank group to perform the external operation, and access the internal memory bank group to perform the internal operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.