Memory device, electronic device and operating method of memory device
US11989422B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2022 |
| Grant date | May 21, 2024 |
| Priority date | — |
| Expiry date | Jul 21, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0411
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device, an electronic device, and a method of operating the memory device are provided. The memory device includes: a volatile memory including a plurality of memory cells, a plurality of word lines and a plurality of bit lines, and configured to provide output data stored in target memory cells, among the plurality of memory cells, based on a first read command and an address received from a host; a recovery logic circuit configured to provide hint data indicating first bit lines to which defective cells are connected, and second bit lines to which normal cells are connected, among the plurality of bit lines; and an Error Correction Circuit (ECC) configured to generate corrected data by correcting an error in the output data based on the output data and the hint data, and to provide the corrected data to the host.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.