Semiconductor integrated circuit, reception device, memory system, and semiconductor storage device for reducing power consumption of equalizer
US11989442B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 15, 2021 |
| Grant date | May 21, 2024 |
| Priority date | — |
| Expiry date | Aug 1, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0079
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit has a reception circuit configured to receive a strobe signal of which a logic is intermittently switched in synchronization with a data signal, an output circuit configured to extract a low frequency component including at least a DC component of the strobe signal received by the reception circuit and to output a first signal, and a comparison circuit configured to compare a signal level of the first signal with a threshold level. The reception circuit is configured to change a boost amount of a high frequency component different from the low frequency component of the strobe signal based on a comparison result obtained by the comparison circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.