Systems and methods for use of capacitive member to prevent chip fraud
US11989607B2 · kind B2 · utility
0Cited by
119References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2022 |
| Grant date | May 21, 2024 |
| Priority date | — |
| Expiry date | Jun 28, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/573
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Example embodiments of systems and methods for preventing chip fraud are provided. A chip fraud prevention system may comprise a device including a chip, wherein the chip is at least partially encompassed in a chip pocket. One or more connections may be communicatively coupled to one or more surfaces of the chip, and a capacitance member may be coupled to a surface of the chip. The capacitance member may comprise a known capacitance value and the chip may comprise a memory containing an applet, wherein the applet is configured to measure the capacitance value of the capacitance member.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.