Low-power low-voltage differential signaling receiver with signal distortion correction
US11990903B1 · kind B1 · utility
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4References
20Claims
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Key dates
| Filing date | Nov 15, 2022 |
| Grant date | May 21, 2024 |
| Priority date | — |
| Expiry date | Nov 15, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0292
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A low-voltage differential signaling receiver is provided that amplifies a differential input voltage to produce a differential output voltage. A signal distortion circuit that detects a distortion in a differential output voltage to assert a signal detection signal that adjusts a gate voltage of a pair of load transistors to reduce the distortion. The load transistors are selectively diode connected to reduce power consumption.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.