Parametrically activated quantum logic gates

US11990905B1 · kind B1 · utility

Assignee

• Rigetti & Co, LLC · US

Inventors

• Eyob A. Sete · Walnut Creek, US
• Nicolas Didier · Berkeley, US
• Marcus Palmer da Silva · Lafayette, US
• Chad Tyler Rigetti · Emeryville, US
• Matthew J. Reagor · Corte Madera, US
• Shane Arthur Caldwell · Oakland, US
• Nikolas Anton Tezak · Oakland, US
• Colm Andrew Ryan · Cambridge, US
• Sabrina Sae Byul Hong · Oakland, US
• Prasahnt Sivarajah · Pasadena, US
• Alexander Papageorge · San Francisco, US
• Deanna Margo Abrams · Oakland, US

Key dates

• Filing date: Apr 26, 2023
• Grant date: May 21, 2024
• Expiry date: Apr 26, 2043

Classification

• Technology area (CPC G): Physics
• CPC primary: G06N10/70
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.