Control of bias current to a load
US11990910B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 26, 2022 |
| Grant date | May 21, 2024 |
| Priority date | — |
| Expiry date | Apr 26, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/453
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit portion comprises a load circuit portion and a bias circuit portion. The load circuit portion comprises a load transistor. The bias circuit portion comprises a replica transistor matched to the load transistor and connected to the load transistor at a node such that when a current flows through the replica transistor, a current proportional to the current through the replica transistor flows through the load transistor. The bias circuit portion also comprises a current input for receiving an input current, a supply voltage input for receiving a supply voltage, and a feedback loop arranged to: adjust a voltage at the node connecting the replica transistor and the load transistor such that the replica transistor conducts a current proportional to the input current, and counteract variations in the voltage at the node connecting the replica transistor and the load transistor arising from changes in the supply voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.