Quantum processor design to increase control footprint
US11991934B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2022 |
| Grant date | May 21, 2024 |
| Priority date | — |
| Expiry date | Dec 23, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06537
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A quantum processor includes: a first chip comprising a qubit array, in which a plurality of qubits within the qubit array define an enclosed region on the first chip, in which each qubit of the plurality of qubits that define the enclosed region is arranged to directly electromagnetically couple to an adjacent qubit of the plurality of qubits that define the enclosed region, and in which each qubit of the qubit array comprises at least two superconductor islands, and a second chip bonded to the first chip, the second chip including one or more qubit control elements, in which the qubit control elements are positioned directly over the enclosed region of the first chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.