Direct memory access (DMA) controller issues memory access requests whereas memory locations having addresses which are offset amounts relative to destination template address
US11995013B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2022 |
| Grant date | May 28, 2024 |
| Priority date | — |
| Expiry date | Aug 26, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1024
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A direct memory access (DMA) controller comprises template storage circuitry to store at least one DMA template indicative of a DMA data access pattern. Each DMA template comprises enable indications settable to an enable state or a disable state. In response to a DMA command associated with a source address, a destination address, a source DMA template, and a destination DMA template, DMA control circuitry generates a set of DMA memory access requests to copy data from source memory system locations to destination memory system locations. The source/destination memory system locations are selected to have addresses which are offset relative to the source/destination address by offset amounts corresponding to positions of enable indications set to the enable state within the source/destination DMA template. The source/destination DMA templates allow irregular patterns of DMA accesses to be controlled in fewer DMA commands.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.