Systems and methods employing new evolution schedules in an analog computer with applications to determining isomorphic graphs and post-processing solutions
US11995513B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 23, 2020 |
| Grant date | May 28, 2024 |
| Priority date | — |
| Expiry date | Mar 29, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N10/80
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A second problem Hamiltonian may replace a first problem Hamiltonian during evolution of an analog processor (e.g., quantum processor) during a first iteration in solving a first problem. This may be repeated during a second, or further successive iterations on the first problem, following re-initialization of the analog processor. An analog processor may evolve under a first non-monotonic evolution schedule during a first iteration, and second non-monotonic evolution schedule under second, or additional non-monotonic evolution schedule under even further iterations. A first graph and second graph may each be processed to extract final states versus a plurality of evolution schedules, and a determination made as to whether the first graph is isomorphic with respect to the second graph. An analog processor may evolve by decreasing a temperature of, and a set of quantum fluctuations, within the analog processor until the analog processor reaches a state preferred by a problem Hamiltonian.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.