Semiconductor devices

US11996414B2 · kind B2 · utility

Assignee

• Flexenable Technology Limited · GB

Inventors

• Jan Jongman · Cambridge, GB
• Joffrey Dury · Cambridge, GB
• Shane Norval · Cambridge, GB

Key dates

• Filing date: Dec 16, 2020
• Grant date: May 28, 2024
• Expiry date: Oct 4, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10K10/82

Abstract

A device comprising a stack of layers defining one or more electronic elements, wherein the stack comprises at least: one or more semiconductor channels; a dielectric; a first conductor pattern defining one or more coupling conductors, wherein the one or more coupling conductors are capacitively coupled to the one or one or more semiconductor channels via the dielectric; a planarisation layer; a second conductor pattern defining one or more routing conductors, wherein the second conductor pattern is in contact with the first conductor pattern via through holes in at least the planarisation layer, and wherein the semiconductor channel regions are at least partly outside the through hole regions.