Patent · US Active

Clock sync input dropout protection

US11996686B2 · kind B2 · utility

22Cited by
7References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 30, 2021
Grant dateMay 28, 2024
Priority date
Expiry dateJan 14, 2042

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH02M3/156
  • WIPO fieldElectrical machinery, apparatus, energy
  • WIPO sectorElectrical engineering

Abstract

In a described example, a circuit includes a synchronization control circuit having a sync input and a sync control output, in which the sync input is coupled to a sync terminal configured to receive an external clock signal. An internal clock generator circuit has a control input and an output. The control input is coupled to the sync control output. An output circuit has first and second signal inputs, a mode control input and a clock output. The first signal input is coupled to the sync input, and the second signal input of the output circuit is coupled to the output of the internal clock generator circuit. The mode control input is coupled to the sync control output, and the clock output adapted to be coupled to a controller.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.