Energy efficient storage of error-correction-detection information
US12001283B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 4, 2023 |
| Grant date | Jun 4, 2024 |
| Priority date | — |
| Expiry date | Apr 4, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1048
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Data and error correction information may involve accessing multiple data channels (e.g., 8) and one error detection and correction channel concurrently. This technique requires a total of N+1 row requests for each access, where N is the number of data channels (e.g., 8 data row accesses and 1 error detection and correction row access equals 9 row accesses.) A single (or at least less than N) data channel row may be accessed concurrently with a single error detection and correction row. This reduces the number of row requests to two (2)—one for the data and one for the error detection and correction information. Because, row requests consume power, reducing the number of row requests is more power efficient.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.