Controlled input/output in progress state during testcase processing
US12001328B2 · kind B2 · utility
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11References
20Claims
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Key dates
| Filing date | Apr 5, 2023 |
| Grant date | Jun 4, 2024 |
| Priority date | — |
| Expiry date | Apr 5, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3696
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A transient input/output in progress state is established during processing of a testcase by a test infrastructure in a computing environment. The method includes obtaining the testcase for an object having one or more pages, and processing the testcase by the test infrastructure. Processing the testcase by the test infrastructure includes, for a page of the object, generating a delay in the processing of the testcase for the page of the object. The delay opens a transient input/output in progress state during which one or more test operations reference the page of the object.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.