Device, method and system to supplement a skewed cache with a victim cache

US12001346B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Thomas Unterluggauer · Hillsboro, US
• Alaa R. Alameldeen · Madison, US
• Scott Constable · Portland, US
• Fangfei Liu · Hillsboro, US
• Francis X. McKeen · Portland, US
• Carlos V. Rozas · Portland, US
• Anna Trikalinou · Hillsboro, US

Key dates

• Filing date: Dec 18, 2020
• Grant date: Jun 4, 2024
• Expiry date: Oct 5, 2042

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F2212/1052
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Techniques and mechanisms for a victim cache to operate in conjunction with a skewed cache to help mitigate the risk of a side-channel attack. In an embodiment, a first line is evicted from a skewed cache, and moved to a victim cache, based on a message indicating that a second line is to be stored to the skewed cache. Subsequently, a request to access the first line results in a search of both the victim cache and sets of the skewed cache which have been mapped to an address corresponding to the first line. Based on the search, the first line is evicted from the victim cache, and reinserted in the skewed cache. In another embodiment, reinsertion of the first line in the skewed cache includes the first line and a third line being swapped between the skewed cache and the victim cache.