Patent · US Active

Interconnect system

US12001375B2 · kind B2 · utility

0Cited by

5References

23Claims

0Family size

Assignee

SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD. · CN

Inventors

Weilin Wang · Zhejiang, CN
Xiaoliang Kang · Shanghai, CN
Xuemin Zhang · Shanghai, CN
Chen Chen · Beijing, CN
Yang Shi · Lo Wu, CN

Key dates

Filing date	Nov 10, 2021
Grant date	Jun 4, 2024
Priority date	—
Expiry date	Jan 14, 2042

Classification

Technology area (CPC G)Physics
CPC primaryG06F13/4282
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A interconnect system, including a plurality of sockets and a first interconnect interface. Any two of the sockets are accessible to each other's hardware resources by transmitting a first packet and a second packet through the first interconnect interface. The first packet includes first interconnect information, used for establishing communication between the two sockets. The second packet includes a first data payload, loaded from one of the two sockets. The sockets include a first socket and a second socket, configured to be interconnected with each other through the first interconnect interface.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.