Reconfigurable processor and reconfigurable processor system
US12001381B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 17, 2020 |
| Grant date | Jun 4, 2024 |
| Priority date | — |
| Expiry date | Feb 3, 2041 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are a reconfigurable processor and a reconfigurable processor system, where the reconfigurable processor includes: a hardware message management module (110), a memory management system (120) and an arithmetic and logic unit (130). The memory management system (120) is connected to the hardware message management module (110) and the arithmetic and logic unit (130) respectively; the hardware message management module (110) is configured to read and parse at least one hardware message, to configure a priority of each of the at least one hardware message and store each of the at least one hardware message into a memory through the memory management system (120); and the arithmetic and logic unit (130) is configured to run the at least one hardware message according to the configured priority.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.