Nonvolatile memory and storage device including same
US12002514B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2022 |
| Grant date | Jun 4, 2024 |
| Priority date | — |
| Expiry date | Dec 6, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory may include; a first memory cell array including a first selection transistor connected to a first string selection line, a second memory cell array including a second selection transistor connected to a second string selection line and spaced apart from the first string selection line by a first cutting line, and a peripheral circuit. The peripheral circuit may provide a first program voltage to the first selection transistor, provide a second program voltage to the second selection transistor different from the first program voltage, program the first selection transistor with a first threshold voltage in response to the first program voltage, and program the second selection transistor with a second threshold voltage level greater than the first threshold voltage in response to the second program voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.