Tip-to-tip graphic preparation method

US12002682B2 · kind B2 · utility

Assignee

• SHANGHAI IC R&D CENTER CO., LTD. · CN

Inventors

• Yanli Li · Los Angeles, US
• Yushu Yang · Shanghai, CN
• Qiang Wu · Hefei, CN

Key dates

• Filing date: Jul 23, 2020
• Grant date: Jun 4, 2024
• Expiry date: Mar 6, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76816
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

The present invention disclosures a Tip-to-Tip pattern preparation method, comprising: providing a substrate, and sequentially forming a layer to be etched, a first hard mask layer, a second hard mask layer, a sacrificial layer, a first dielectric layer and a first photoresist layer on the substrate, forming a first patterned photoresist layer which has a first Tip-to-Tip pattern by EUV lithography, and transferring the first Tip-to-Tip pattern to the second hard mask layer by etching; then forming a second patterned photoresist layer which has a second Tip-to-Tip pattern by the EUV lithography, and transferring the second Tip-to-Tip pattern to the second hard mask layer by etching; finally, transferring the first Tip-to-Tip pattern and the second Tip-to-Tip pattern to the layer to be etched. The above method needs only performing the EUV lithography twice to form the small-sized Tip-to-Tip pattern with a period halved, that is, the EUV lithography and etching are used for reducing lithography layers and realizing to form the small-sized Tip-to-Tip pattern with the period halved.