Electrostatic protection circuit, display substrate and display apparatus
US12003093B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 15, 2021 |
| Grant date | Jun 4, 2024 |
| Priority date | — |
| Expiry date | Feb 15, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/1216
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Disclosed are an electrostatic protection circuit, a display substrate and a display apparatus. The electrostatic protection circuit includes: a plurality of first transistors (11) on a base substrate, each of which includes a gate, an active layer (112), a first electrode (113), a second electrode (114) and a connection part (115). Gates of the first transistors (11) are connected to each other to form a control line (12). The first electrode (113) of each first transistor (11) is electrically connected to a panel crack detect line (PL), the connection part (115) is connected between the first electrode (113) and the second electrode (114), and the active layer (112) and the gate of each first transistor (11) are arranged in an overlapping manner and insulated and separated from each other to form a first capacitor. The control line (12) is electrically connected to a first power supply line (VSS).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.