Patent · US Active

Dynamic configuration of spur cancellation

US12003244B2 · kind B2 · utility

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20Claims
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Assignee

Inventors

Key dates

Filing dateSep 8, 2021
Grant dateJun 4, 2024
Priority date
Expiry dateMay 4, 2042

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04B15/04
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Embodiments relate to updating spur cancellation at a victim integrated circuit (IC) in accordance with dynamic changes in the operating frequencies of an aggressor IC. The aggressor IC changes its operating frequencies at an update time that is determined in advance. The update time and the changes to the operating frequencies are shared with the victim IC. The victim IC dynamically updates the relationships between frequencies of local clock signals for the victim IC and the aggressor IC. The victim IC generates a spur cancellation parameter based on the updated relationships of local clock frequencies, the update time and the changes to the operating frequencies of the aggressor IC, and configures a spur cancellation circuit. In this way, the victim IC may perform effective spur cancellation despite changes in the operating frequencies of the aggressor IC and deviation of the local clock frequencies.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.