Network interface with resource coordinator
US12003425B2 · kind B2 · utility
0Cited by
0References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 28, 2021 |
| Grant date | Jun 4, 2024 |
| Priority date | — |
| Expiry date | Jul 28, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L63/166
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes: a processor; a receiver coupled to the processor; and memory coupled to the processor. The memory stores resource coordinator instructions that, when executed by the processor, cause the processor to: maintain a plurality of active secure sessions; identify a priority session trigger; and allocate receiver resources for incoming packets related to the plurality of active secure sessions based on the priority session trigger.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.