Display panel and display device for IVL testing
US12004396B2 · kind B2 · utility
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19Claims
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Key dates
| Filing date | Sep 28, 2022 |
| Grant date | Jun 4, 2024 |
| Priority date | — |
| Expiry date | Sep 28, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/1213
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A display panel includes: a silicon-based substrate, a driving layer, a first electrode layer, an organic light emitting layer, a second electrode layer and a plurality of pads. Where, the display signal access pad is configured to access the display signal during a display phase, the test signal access pad at least includes a first group of test phase access pads, and the first group of test phase access pads includes a first pad and a second pad, the first pad is electrically connected with the electrode ring, and the second pad is electrically connected with the silicon-based substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.