Direct data transfer system
US12007914B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 19, 2022 |
| Grant date | Jun 11, 2024 |
| Priority date | — |
| Expiry date | Dec 22, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/454
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present description concerns a system comprising a processor and an SDMA circuit of direct transfer of a data sequence between a source memory circuit and a destination memory circuit, a sub-region of the source circuit comprising the elements of a data array, the SDMA decoding computing kernel information called BIT_PATTERN of an elementary data pattern to be transferred defined from an elementary array having a predefined size smaller than the size of said data array and intended to identify an elementary array window of said array, each element of the elementary array comprising a bit capable of taking a state “1” or “0” according to whether the element belongs or not to said pattern, the SDMA recovering the data of said array associated with elements of the BIT_PATTERN having their bit at “1”.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.