Patent · US Active

Scalable interrupts

US12007920B2 · kind B2 · utility

1Cited by

3References

20Claims

0Family size

Assignee

Apple Inc. · US

Inventors

Jeffrey E. Gonion · Campbell, US
Charles E. Tucker · Campbell, US
Tal Kuzi · Tel Aviv-Yafo, IL
Richard F. Russo · San Jose, US
Mridul Agarwal · Sunnyvale, US
Christopher M. Tsay · Austin, US
Gideon N. Levinsky · Cedar Park, US
Shih-Chieh Wen · San Jose, US
Lior Zimet · Kerem Maharal, IL

Key dates

Filing date	Apr 17, 2023
Grant date	Jun 11, 2024
Priority date	—
Expiry date	Apr 17, 2043

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An interrupt delivery mechanism for a system includes and interrupt controller and a plurality of cluster interrupt controllers coupled to respective pluralities of processors in an embodiment. The interrupt controller may serially transmit an interrupt request to respective cluster interrupt controllers, which may acknowledge (Ack) or non-acknowledge (Nack) the interrupt based on attempting to deliver the interrupt to processors to which the cluster interrupt controller is coupled. In a soft iteration, the cluster interrupt controller may attempt to deliver the interrupt to processors that are powered on, without attempting to power on processors that are powered off. If the soft iteration does not result in an Ack response from one of the plurality of cluster interrupt controllers, a hard iteration may be performed in which the powered-off processors may be powered on.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.