Memory management method, memory storage device and memory control circuit unit
US12008239B1 · kind B1 · utility
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21Claims
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Key dates
| Filing date | Jan 9, 2023 |
| Grant date | Jun 11, 2024 |
| Priority date | — |
| Expiry date | Feb 11, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0679
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory management method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: sending an erase command sequence configured to erase a first physical erasing unit in a rewritable non-volatile memory module; and sending a write command sequence configured to perform a dummy write operation on a second physical erasing unit in the rewritable non-volatile memory module with correspondence to the erasing of the first physical erasing unit. The dummy write operation is configured to store dummy data to the second physical erasing unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.