System and method applied with computing-in-memory
US12009029B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2023 |
| Grant date | Jun 11, 2024 |
| Priority date | — |
| Expiry date | Mar 16, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2013/0054
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system is provided. The system includes a multiply-and-accumulate circuit and a local generator. The multiply-and-accumulate circuit is coupled to a memory array and generates a multiply-and-accumulate signal indicating a computational output of the memory array. The local generator is coupled to the memory array and generates at least one reference signal at a node in response to one of a plurality of global signals that are generated according to a number of the computational output. The local generator is further configured to generate an output signal according to the signal and a summation of the at least one reference signal at the node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.