Timing skew calibration in time-interleaved data converters in carrier aggregation
US12010072B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 17, 2022 |
| Grant date | Jun 11, 2024 |
| Priority date | — |
| Expiry date | Jul 15, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L5/0073
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An apparatus includes an analog to digital converter configured to receive one or more first frames of a first component carrier signal having a first uplink-downlink subframe pattern, and receive one or more additional frames of at least one additional component carrier signal, the one more or more additional frames including one or more second frames of a second component carrier signal, the at least one additional component carrier signal including the second component carrier signal. The apparatus may further include control logic configured to activate timing skew calibration of at least one of the first or second component carrier signals based, at least in part, on an operating mode of the second component carrier signal and respective symbols of the first component carrier signal and second component carrier signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.