Semiconductor device having a butted contact and method of forming
US12010826B2 · kind B2 · utility
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3References
20Claims
0Family size
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Key dates
| Filing date | Mar 15, 2023 |
| Grant date | Jun 11, 2024 |
| Priority date | — |
| Expiry date | Mar 15, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes a first transistor comprising a first gate structure over a first active region in a substrate. The semiconductor structure further includes a second active region in the substrate. The semiconductor structure further includes a first butted contact. The first butted contact includes a first portion extending in a first direction and overlapping the second active region, and a second portion extending from the first portion, wherein the second portion directly contacts each of a top surface and a sidewall of the first gate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.