Patent · US Active

Apparatus and architecture of non-volatile memory module in parallel configuration

US12014078B2 · kind B2 · utility

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9References
4Claims
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Key dates

Filing dateSep 21, 2022
Grant dateJun 18, 2024
Priority date
Expiry dateSep 21, 2042

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A non-volatile memory module in parallel architecture is described. It includes memory function and data storage function in a single module. It enables host system to use memory bus to access storage devices and to use the same memory command protocol for storage device access. The parallel architecture enables contents in memory devices and storage devices to be exchanged freely on module under the control of host memory controller to boost performance of computer and to retain data even if power to computer is shut off. The configuration of non-volatile memory module can be partitioned or expanded into multiple independent channels on module seamlessly with or without ECC supports.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.