Semiconductor memory device having composite dielectric film structure and methods of forming the same
US12014966B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2023 |
| Grant date | Jun 18, 2024 |
| Priority date | — |
| Expiry date | Mar 1, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/258
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device and method of making the same are disclosed. The semiconductor memory device includes a substrate that includes a memory region and a peripheral region, a transistor including a metal gate located in the peripheral region, a composite dielectric film structure located over the metal gate of the transistor, the composite dielectric film structure including a first dielectric layer and a second dielectric layer over the first dielectric layer, where the second dielectric layer has a greater density than a density of the first dielectric layer, and at least one memory cell located in the memory region. The composite dielectric film structure provides enhanced protection of the metal gate against etching damage and thereby improves device performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.