Transient voltage suppression device and manufacturing method therefor
US12015025B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2019 |
| Grant date | Jun 18, 2024 |
| Priority date | — |
| Expiry date | Jul 16, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/126
Abstract
A transient voltage suppression device includes: a substrate; a first conductive type well region including a first well and a second well; a second conductive type well region including a third well and a fourth well, the third well being disposed between the first well and the second well so as to isolate the first well and the second well, and the second well being disposed between the third well and the fourth well; a zener diode active region; a first doped region, provided in the first well; a second doped region, provided in the first well; a third doped region, provided in the second well; a fourth doped region, provided in the second well; a fifth doped region, provided in the zener diode active region; and a sixth doped region, provided in the zener diode active region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.