Level shifter with GIDL current reduction
US12015407B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 2, 2023 |
| Grant date | Jun 18, 2024 |
| Priority date | — |
| Expiry date | Feb 2, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018528
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit that includes a level shifter. The level shifter includes a shift path with two transistors coupled in series. The circuit also includes a GIDL detection circuit for detecting GIDL current conditions. The GIDL detection circuit generates a GIDL signal indicative of a GIDL current condition. The signal is utilized to control a voltage of a control electrode of a transistor of the shift path to increase the conductivity of the transistor when the signal is indicative of a GIDL current condition to minimize a GIDL current through at least a portion of the shift path when the second transistor is nonconductive due to the level shifter being in a low power mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.