Input buffer circuit, analog-to-digital converter system, receiver, base station, mobile device and method for operating an input buffer circuit
US12015417B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2020 |
| Grant date | Jun 18, 2024 |
| Priority date | — |
| Expiry date | Oct 16, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/16
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An input buffer circuit for an analog-to-digital converter is provided. The input buffer circuit includes a buffer amplifier. The buffer amplifier includes a first input node and a second input node each configured to receive a respective one of a first input signal and a second input signal forming a differential input signal pair for the analog-to-digital converter. The buffer amplifier further includes a first output node and a second output node each configured to output a respective one of a first buffered signal and a second buffered signal. In addition, the input buffer circuit includes feedback circuitry. The feedback circuitry is configured to generate, based on the first buffered signal and the second buffered signal, a first feedback signal and a second feedback signal for mitigating a respective unwanted signal component at the first input node and the second input node related to a limited reverse isolation of the amplifier buffer. The feedback circuitry is further configured to supply the first feedback signal to the first input node and the second feedback signal to the second input node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.